{"id":10021304,"date":"2026-03-12T07:26:56","date_gmt":"2026-03-11T23:26:56","guid":{"rendered":"https:\/\/itmax.cn\/?p=10021304"},"modified":"2026-03-12T07:26:56","modified_gmt":"2026-03-11T23:26:56","slug":"ram%e5%92%8crom%e7%9a%84%e7%bb%93%e6%9e%84%e5%92%8c%e5%8e%9f%e7%90%86","status":"publish","type":"post","link":"https:\/\/itmax.cn\/?p=10021304","title":{"rendered":"RAM\u548cROM\u7684\u7ed3\u6784\u548c\u539f\u7406"},"content":{"rendered":"

\u5927\u5bb6\u597d\uff0c\u6211\u662f\u826f\u8bb8\u3002<\/p>\n

\u5728\u5d4c\u5165\u5f0f\u5f00\u53d1\u4e2d\uff0cRAM \u548c ROM \u662f\u6211\u4eec\u6bcf\u5929\u90fd\u8981\u6253\u4ea4\u9053\u7684\u4e24\u79cd\u5b58\u50a8\u5668\u3002<\/p>\n

\u65e0\u8bba\u662f\u8c03\u8bd5 STM32 \u5355\u7247\u673a\u65f6\u67e5\u770b\u5185\u5b58\u5206\u914d\uff0c\u8fd8\u662f\u4f18\u5316\u7a0b\u5e8f\u6027\u80fd\u65f6\u5206\u6790\u5b58\u50a8\u7ed3\u6784\uff0c\u6df1\u5165\u7406\u89e3\u5b83\u4eec\u7684\u5de5\u4f5c\u539f\u7406\u90fd\u81f3\u5173\u91cd\u8981\u3002<\/p>\n

\u4eca\u5929\u6211\u4eec\u5c31\u4ece\u5e95\u5c42\u786c\u4ef6\u7ed3\u6784\u51fa\u53d1\uff0c\u804a\u804a\u8fd9\u4e24\u79cd\u5b58\u50a8\u5668\u7684\u672c\u8d28\u533a\u522b\u548c\u5de5\u4f5c\u673a\u5236\u3002<\/p>\n

1. RAM \u7684\u7ed3\u6784\u4e0e\u5de5\u4f5c\u539f\u7406<\/h2>\n

RAM\uff08Random Access Memory\uff0c\u968f\u673a\u5b58\u53d6\u5b58\u50a8\u5668\uff09\u662f\u4e00\u79cd\u6613\u5931\u6027\u5b58\u50a8\u5668\uff0c\u65ad\u7535\u540e\u6570\u636e\u4f1a\u4e22\u5931\u3002<\/p>\n

\u5b83\u4e3b\u8981\u5206\u4e3a SRAM \u548c DRAM \u4e24\u5927\u7c7b\u3002<\/p>\n

1.1 SRAM \u7684\u7ed3\u6784\u539f\u7406<\/h3>\n

SRAM\uff08Static RAM\uff0c\u9759\u6001\u968f\u673a\u5b58\u53d6\u5b58\u50a8\u5668\uff09\u4f7f\u7528\u53cc\u7a33\u6001\u89e6\u53d1\u5668\u6765\u5b58\u50a8\u6570\u636e\u3002<\/p>\n

\u6bcf\u4e2a\u5b58\u50a8\u5355\u5143\u7531 6 \u4e2a\u6676\u4f53\u7ba1\u7ec4\u6210\uff0c\u5f62\u6210\u4e00\u4e2a\u9501\u5b58\u5668\u7535\u8def\u3002<\/p>\n

\u8fd9\u79cd\u7ed3\u6784\u7684\u4f18\u70b9\u662f\u53ea\u8981\u4f9b\u7535\uff0c\u6570\u636e\u5c31\u80fd\u4e00\u76f4\u4fdd\u6301\uff0c\u4e0d\u9700\u8981\u5237\u65b0\u64cd\u4f5c\u3002<\/p>\n

SRAM \u7684\u57fa\u672c\u5b58\u50a8\u5355\u5143\u5305\u542b\u4e24\u4e2a\u4ea4\u53c9\u8026\u5408\u7684\u53cd\u76f8\u5668\uff0c\u5b83\u4eec\u5f62\u6210\u4e00\u4e2a\u6b63\u53cd\u9988\u56de\u8def\u3002<\/p>\n

\u5f53\u5b58\u50a8”1″\u65f6\uff0c\u4e00\u4e2a\u53cd\u76f8\u5668\u8f93\u51fa\u9ad8\u7535\u5e73\uff0c\u53e6\u4e00\u4e2a\u8f93\u51fa\u4f4e\u7535\u5e73\uff1b\u5b58\u50a8”0″\u65f6\u5219\u76f8\u53cd\u3002<\/p>\n

\u8fd9\u79cd\u53cc\u7a33\u6001\u7ed3\u6784\u4f7f\u5f97\u6570\u636e\u975e\u5e38\u7a33\u5b9a\uff0c\u8bfb\u5199\u901f\u5ea6\u4e5f\u5f88\u5feb\u3002<\/p>\n

\u5728 STM32 \u7b49\u5355\u7247\u673a\u4e2d\uff0c\u7247\u4e0a SRAM \u5c31\u662f\u8fd9\u79cd\u7c7b\u578b\u3002<\/p>\n

\u6bd4\u5982 STM32F103 \u7cfb\u5217\u6709 20KB \u7684 SRAM\uff0c\u5b83\u88ab\u6620\u5c04\u5230 0x20000000 \u5730\u5740\u5f00\u59cb\u7684\u7a7a\u95f4\u3002<\/p>\n

\u5f53\u6211\u4eec\u5b9a\u4e49\u5168\u5c40\u53d8\u91cf\u6216\u4f7f\u7528 malloc \u52a8\u6001\u5206\u914d\u5185\u5b58\u65f6\uff0c\u5b9e\u9645\u4e0a\u5c31\u662f\u5728\u4f7f\u7528\u8fd9\u5757 SRAM\u3002<\/p>\n

\/\/ SRAM\u4f7f\u7528\u793a\u4f8b\nuint8_t global_buffer[1024];  \/\/ \u5168\u5c40\u53d8\u91cf\u5b58\u50a8\u5728SRAM\u4e2d\n\u200b\nvoid sram_test(void)\n{\n    \/\/ \u5c40\u90e8\u53d8\u91cf\u4e5f\u5728SRAM\u4e2d\uff08\u6808\u533a\uff09\n    uint32_t local_var = 0x12345678;\n    \n    \/\/ \u52a8\u6001\u5206\u914d\u5185\u5b58\u5728SRAM\u7684\u5806\u533a\n    uint8_t *dynamic_buffer = (uint8_t*)malloc(512);\n    \n    if(dynamic_buffer != NULL) {\n        \/\/ \u5bf9SRAM\u8fdb\u884c\u8bfb\u5199\u64cd\u4f5c\n        for(int i = 0; i < 512; i++) {\n            dynamic_buffer[i] = i & 0xFF;\n        }\n        \n        free(dynamic_buffer);\n    }\n}<\/code><\/pre>\n
SRAM \u7684\u8bbf\u95ee\u901f\u5ea6\u975e\u5e38\u5feb\uff0c\u901a\u5e38\u53ea\u9700\u8981\u51e0\u7eb3\u79d2\uff0c\u800c\u4e14\u529f\u8017\u76f8\u5bf9\u8f83\u4f4e\uff08\u5728\u9759\u6001\u72b6\u6001\u4e0b\uff09\u3002<\/p>\n
\u4f46\u5b83\u7684\u7f3a\u70b9\u662f\u96c6\u6210\u5ea6\u4f4e\uff0c\u6bcf\u4e2a bit \u9700\u8981 6 \u4e2a\u6676\u4f53\u7ba1\uff0c\u56e0\u6b64\u6210\u672c\u8f83\u9ad8\uff0c\u5bb9\u91cf\u4e5f\u53d7\u9650\u3002<\/p>\n
1.2 DRAM \u7684\u7ed3\u6784\u539f\u7406<\/h3>\n
DRAM\uff08Dynamic RAM\uff0c\u52a8\u6001\u968f\u673a\u5b58\u53d6\u5b58\u50a8\u5668\uff09\u7684\u7ed3\u6784\u8981\u7b80\u5355\u5f97\u591a\uff0c\u6bcf\u4e2a\u5b58\u50a8\u5355\u5143\u53ea\u9700\u8981 1 \u4e2a\u6676\u4f53\u7ba1\u548c 1 \u4e2a\u7535\u5bb9\u3002<\/p>\n
\u7535\u5bb9\u5145\u7535\u8868\u793a”1″\uff0c\u653e\u7535\u8868\u793a”0″\u3002<\/p>\n
\u8fd9\u79cd\u7ed3\u6784\u4f7f\u5f97 DRAM \u7684\u96c6\u6210\u5ea6\u975e\u5e38\u9ad8\uff0c\u53ef\u4ee5\u505a\u5230\u5f88\u5927\u7684\u5bb9\u91cf\u3002<\/p>\n
\u4f46 DRAM \u6709\u4e2a\u81f4\u547d\u7f3a\u70b9\uff1a\u7535\u5bb9\u4f1a\u6f0f\u7535\u3002<\/p>\n
\u5373\u4f7f\u4e0d\u8fdb\u884c\u8bfb\u5199\u64cd\u4f5c\uff0c\u7535\u5bb9\u4e0a\u7684\u7535\u8377\u4e5f\u4f1a\u9010\u6e10\u6d41\u5931\uff0c\u5bfc\u81f4\u6570\u636e\u4e22\u5931\u3002<\/p>\n
\u56e0\u6b64 DRAM \u9700\u8981\u5b9a\u671f\u5237\u65b0\uff0c\u901a\u5e38\u6bcf\u9694\u51e0\u5341\u6beb\u79d2\u5c31\u8981\u91cd\u65b0\u5145\u7535\u4e00\u6b21\u3002<\/p>\n
\u8fd9\u4e2a\u5237\u65b0\u64cd\u4f5c\u4f1a\u6d88\u8017\u989d\u5916\u7684\u529f\u8017\uff0c\u4e5f\u4f1a\u5360\u7528\u4e00\u5b9a\u7684\u8bbf\u95ee\u65f6\u95f4\u3002<\/p>\n
\u5728\u5d4c\u5165\u5f0f\u7cfb\u7edf\u4e2d\uff0c\u5982\u679c\u9700\u8981\u4f7f\u7528\u5927\u5bb9\u91cf\u5185\u5b58\uff08\u6bd4\u5982\u8fd0\u884c Linux \u7cfb\u7edf\u7684 ARM \u5f00\u53d1\u677f\uff09\uff0c\u901a\u5e38\u4f1a\u5916\u63a5 DRAM \u82af\u7247\uff0c\u6bd4\u5982 DDR\u3001DDR2\u3001DDR3 \u7b49\u3002<\/p>\n
\u8fd9\u4e9b\u90fd\u662f DRAM \u7684\u6539\u8fdb\u7248\u672c\uff0c\u901a\u8fc7\u53cc\u500d\u6570\u636e\u901f\u7387\u7b49\u6280\u672f\u63d0\u5347\u6027\u80fd\u3002<\/p>\n
\/\/ \u5728Linux\u5e94\u7528\u5f00\u53d1\u4e2d\u4f7f\u7528DRAM\u7684\u793a\u4f8b\n#include <stdio.h>\n#include <stdlib.h>\n#include <string.h>\n\u200b\nvoid dram_usage_example(void)\n{\n    \/\/ \u5728Linux\u7cfb\u7edf\u4e2d\uff0cmalloc\u5206\u914d\u7684\u5185\u5b58\u6765\u81eaDRAM\n    size_t size = 10 * 1024 * 1024;  \/\/ 10MB\n    char *large_buffer = (char*)malloc(size);\n    \n    if(large_buffer != NULL) {\n        \/\/ \u521d\u59cb\u5316\u5185\u5b58\n        memset(large_buffer, 0xAA, size);\n        \n        \/\/ \u8fdb\u884c\u4e00\u4e9b\u64cd\u4f5c\n        printf("Allocated %zu bytes in DRAM\/n", size);\n        \n        \/\/ \u91ca\u653e\u5185\u5b58\n        free(large_buffer);\n    }\n}<\/code><\/pre>\n
1.3 RAM \u7684\u8bfb\u5199\u65f6\u5e8f<\/h3>\n
RAM \u7684\u8bfb\u5199\u64cd\u4f5c\u9700\u8981\u9075\u5faa\u7279\u5b9a\u7684\u65f6\u5e8f\u3002<\/p>\n
\u4ee5 SRAM \u4e3a\u4f8b\uff0c\u8bfb\u64cd\u4f5c\u7684\u57fa\u672c\u6d41\u7a0b\u662f\uff1a\u9996\u5148\u5c06\u5730\u5740\u4fe1\u53f7\u653e\u5230\u5730\u5740\u603b\u7ebf\u4e0a\uff0c\u7136\u540e\u62c9\u4f4e\u7247\u9009\u4fe1\u53f7 CS \u548c\u8bfb\u4f7f\u80fd\u4fe1\u53f7 OE\uff0c\u7ecf\u8fc7\u4e00\u5b9a\u7684\u8bbf\u95ee\u65f6\u95f4\u540e\uff0c\u6570\u636e\u5c31\u4f1a\u51fa\u73b0\u5728\u6570\u636e\u603b\u7ebf\u4e0a\u3002<\/p>\n
\u5199\u64cd\u4f5c\u5219\u9700\u8981\u5c06\u5730\u5740\u548c\u6570\u636e\u540c\u65f6\u51c6\u5907\u597d\uff0c\u7136\u540e\u62c9\u4f4e\u7247\u9009\u4fe1\u53f7 CS \u548c\u5199\u4f7f\u80fd\u4fe1\u53f7 WE\uff0c\u4fdd\u6301\u4e00\u5b9a\u65f6\u95f4\u540e\u5b8c\u6210\u5199\u5165\u3002<\/p>\n
\u5728 STM32 \u4e2d\u4f7f\u7528 FSMC\uff08\u7075\u6d3b\u9759\u6001\u5b58\u50a8\u63a7\u5236\u5668\uff09\u5916\u63a5 SRAM \u65f6\uff0c\u6211\u4eec\u9700\u8981\u914d\u7f6e\u8fd9\u4e9b\u65f6\u5e8f\u53c2\u6570\uff1a<\/p>\n
void FSMC_SRAM_Init(void)\n{\n    FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;\n    FSMC_NORSRAMTimingInitTypeDef ReadWriteTiming;\n    \n    \/\/ \u914d\u7f6e\u8bfb\u5199\u65f6\u5e8f\n    ReadWriteTiming.FSMC_AddressSetupTime = 0x00;      \/\/ \u5730\u5740\u5efa\u7acb\u65f6\u95f4\n    ReadWriteTiming.FSMC_AddressHoldTime = 0x00;       \/\/ \u5730\u5740\u4fdd\u6301\u65f6\u95f4\n    ReadWriteTiming.FSMC_DataSetupTime = 0x03;         \/\/ \u6570\u636e\u5efa\u7acb\u65f6\u95f4\n    ReadWriteTiming.FSMC_BusTurnAroundDuration = 0x00; \/\/ \u603b\u7ebf\u8f6c\u6362\u65f6\u95f4\n    ReadWriteTiming.FSMC_CLKDivision = 0x00;\n    ReadWriteTiming.FSMC_DataLatency = 0x00;\n    ReadWriteTiming.FSMC_AccessMode = FSMC_AccessMode_A;\n    \n    \/\/ FSMC\u914d\u7f6e\n    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;\n    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;\n    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;\n    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;\n    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;\n    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;\n    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;\n    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;\n    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;\n    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;\n    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;\n    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;\n    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &ReadWriteTiming;\n    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &ReadWriteTiming;\n    \n    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);\n    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);\n}<\/code><\/pre>\n
2. ROM \u7684\u7ed3\u6784\u4e0e\u5de5\u4f5c\u539f\u7406<\/h2>\n
ROM\uff08Read-Only Memory\uff0c\u53ea\u8bfb\u5b58\u50a8\u5668\uff09\u662f\u4e00\u79cd\u975e\u6613\u5931\u6027\u5b58\u50a8\u5668\uff0c\u65ad\u7535\u540e\u6570\u636e\u4e0d\u4f1a\u4e22\u5931\u3002<\/p>\n
\u867d\u7136\u53eb”\u53ea\u8bfb”\uff0c\u4f46\u73b0\u4ee3\u7684 ROM \u5927\u591a\u6570\u90fd\u53ef\u4ee5\u64e6\u5199\uff0c\u53ea\u662f\u64e6\u5199\u6b21\u6570\u548c\u901f\u5ea6\u6709\u9650\u5236\u3002<\/p>\n
2.1 Flash \u5b58\u50a8\u5668\u7684\u7ed3\u6784<\/h3>\n
\u5728\u5d4c\u5165\u5f0f\u7cfb\u7edf\u4e2d\uff0c\u6211\u4eec\u6700\u5e38\u7528\u7684 ROM \u5176\u5b9e\u662f Flash \u5b58\u50a8\u5668\u3002<\/p>\n
Flash \u5206\u4e3a NOR Flash \u548c NAND Flash \u4e24\u79cd\u7c7b\u578b\u3002<\/p>\n
STM32 \u7b49\u5355\u7247\u673a\u5185\u90e8\u96c6\u6210\u7684\u5c31\u662f NOR Flash\u3002<\/p>\n
NOR Flash \u7684\u5b58\u50a8\u5355\u5143\u662f\u6d6e\u6805\u6676\u4f53\u7ba1\u3002<\/p>\n
\u6bcf\u4e2a\u6676\u4f53\u7ba1\u6709\u4e24\u4e2a\u6805\u6781\uff1a\u63a7\u5236\u6805\u548c\u6d6e\u6805\u3002\u6d6e\u6805\u88ab\u7edd\u7f18\u5c42\u5305\u56f4\uff0c\u53ef\u4ee5\u957f\u671f\u4fdd\u5b58\u7535\u8377\u3002<\/p>\n
\u5f53\u6d6e\u6805\u4e2d\u6709\u7535\u8377\u65f6\uff0c\u6676\u4f53\u7ba1\u7684\u9608\u503c\u7535\u538b\u5347\u9ad8\uff0c\u8868\u793a”0″\uff1b\u6ca1\u6709\u7535\u8377\u65f6\u9608\u503c\u7535\u538b\u8f83\u4f4e\uff0c\u8868\u793a”1″\u3002<\/p>\n
Flash \u7684\u7f16\u7a0b\uff08\u5199\u5165\uff09\u64cd\u4f5c\u662f\u901a\u8fc7\u91cf\u5b50\u96a7\u7a7f\u6548\u5e94\u5b9e\u73b0\u7684\u3002<\/p>\n
\u5728\u63a7\u5236\u6805\u548c\u6f0f\u6781\u4e4b\u95f4\u65bd\u52a0\u9ad8\u7535\u538b\uff0c\u7535\u5b50\u5c31\u4f1a\u7a7f\u8fc7\u7edd\u7f18\u5c42\u8fdb\u5165\u6d6e\u6805\u3002<\/p>\n
\u64e6\u9664\u64cd\u4f5c\u5219\u76f8\u53cd\uff0c\u901a\u8fc7\u65bd\u52a0\u53cd\u5411\u9ad8\u7535\u538b\uff0c\u8ba9\u7535\u5b50\u4ece\u6d6e\u6805\u4e2d\u9038\u51fa\u3002<\/p>\n
2.2 Flash \u7684\u6247\u533a\u548c\u9875<\/h3>\n
Flash \u5b58\u50a8\u5668\u4e0d\u80fd\u50cf RAM \u90a3\u6837\u968f\u610f\u8bfb\u5199\uff0c\u5b83\u6709\u7279\u5b9a\u7684\u7ec4\u7ec7\u7ed3\u6784\u3002<\/p>\n
Flash \u88ab\u5206\u6210\u591a\u4e2a\u6247\u533a\uff08Sector\uff09\uff0c\u6bcf\u4e2a\u6247\u533a\u53c8\u5206\u6210\u591a\u4e2a\u9875\uff08Page\uff09\u3002<\/p>\n
\u64e6\u9664\u64cd\u4f5c\u53ea\u80fd\u4ee5\u6247\u533a\u4e3a\u5355\u4f4d\uff0c\u800c\u7f16\u7a0b\u64cd\u4f5c\u901a\u5e38\u4ee5\u9875\u6216\u5b57\u4e3a\u5355\u4f4d\u3002<\/p>\n
\u4ee5 STM32F103 \u4e3a\u4f8b\uff0c\u5b83\u7684 Flash \u88ab\u5206\u6210\u591a\u4e2a 1KB \u6216 2KB \u7684\u9875\u3002<\/p>\n
\u5728\u7f16\u7a0b\u4e4b\u524d\u5fc5\u987b\u5148\u64e6\u9664\u5bf9\u5e94\u7684\u9875\uff0c\u64e6\u9664\u540e\u6240\u6709 bit \u90fd\u53d8\u6210 1\uff080xFF\uff09\u3002<\/p>\n
\u7136\u540e\u624d\u80fd\u8fdb\u884c\u7f16\u7a0b\u64cd\u4f5c\uff0c\u5c06\u67d0\u4e9b bit \u4ece 1 \u53d8\u6210 0\u3002<\/p>\n
\u5982\u679c\u8981\u5c06 0 \u53d8\u56de 1\uff0c\u5fc5\u987b\u91cd\u65b0\u64e6\u9664\u6574\u4e2a\u9875\u3002<\/p>\n
\/\/ STM32 Flash\u64cd\u4f5c\u793a\u4f8b\n#include "stm32f1xx_hal.h"\n\u200b\n#define FLASH_USER_START_ADDR   0x08010000  \/\/ \u7528\u6237Flash\u8d77\u59cb\u5730\u5740\n#define FLASH_USER_END_ADDR     0x0801FFFF  \/\/ \u7528\u6237Flash\u7ed3\u675f\u5730\u5740\n\u200b\n\/\/ \u64e6\u9664Flash\nHAL_StatusTypeDef Flash_Erase(uint32_t start_addr, uint32_t end_addr)\n{\n    HAL_StatusTypeDef status = HAL_OK;\n    FLASH_EraseInitTypeDef EraseInitStruct;\n    uint32_t PageError = 0;\n    \n    \/\/ \u89e3\u9501Flash\n    HAL_FLASH_Unlock();\n    \n    \/\/ \u914d\u7f6e\u64e6\u9664\u53c2\u6570\n    EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;\n    EraseInitStruct.PageAddress = start_addr;\n    EraseInitStruct.NbPages = (end_addr - start_addr) \/ FLASH_PAGE_SIZE;\n    \n    \/\/ \u6267\u884c\u64e6\u9664\n    status = HAL_FLASHEx_Erase(&EraseInitStruct, &PageError);\n    \n    \/\/ \u9501\u5b9aFlash\n    HAL_FLASH_Lock();\n    \n    return status;\n}\n\u200b\n\/\/ \u5199\u5165Flash\nHAL_StatusTypeDef Flash_Write(uint32_t addr, uint32_t *data, uint32_t len)\n{\n    HAL_StatusTypeDef status = HAL_OK;\n    uint32_t i;\n    \n    \/\/ \u89e3\u9501Flash\n    HAL_FLASH_Unlock();\n    \n    \/\/ \u6309\u5b57\u5199\u5165\n    for(i = 0; i < len; i++) {\n        status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, \n                                   addr + i * 4, \n                                   data[i]);\n        if(status != HAL_OK) {\n            break;\n        }\n    }\n    \n    \/\/ \u9501\u5b9aFlash\n    HAL_FLASH_Lock();\n    \n    return status;\n}\n\u200b\n\/\/ \u8bfb\u53d6Flash\nvoid Flash_Read(uint32_t addr, uint32_t *data, uint32_t len)\n{\n    uint32_t i;\n    \n    for(i = 0; i < len; i++) {\n        data[i] = *(__IO uint32_t*)(addr + i * 4);\n    }\n}<\/code><\/pre>\n
2.3 Flash \u7684\u5bff\u547d\u548c\u78e8\u635f\u5747\u8861<\/h3>\n
Flash \u5b58\u50a8\u5668\u7684\u64e6\u5199\u6b21\u6570\u662f\u6709\u9650\u7684\uff0c\u901a\u5e38 NOR Flash \u53ef\u4ee5\u64e6\u5199 10 \u4e07\u5230 100 \u4e07\u6b21\u3002<\/p>\n
\u8fd9\u662f\u56e0\u4e3a\u6bcf\u6b21\u64e6\u5199\u90fd\u4f1a\u5bf9\u7edd\u7f18\u5c42\u9020\u6210\u5fae\u5c0f\u7684\u635f\u4f24\uff0c\u7d2f\u79ef\u5230\u4e00\u5b9a\u7a0b\u5ea6\u540e\uff0c\u6d6e\u6805\u5c31\u65e0\u6cd5\u53ef\u9760\u5730\u4fdd\u6301\u7535\u8377\u4e86\u3002<\/p>\n
\u5728\u5b9e\u9645\u5e94\u7528\u4e2d\uff0c\u5982\u679c\u9891\u7e41\u5730\u5bf9\u540c\u4e00\u4e2a\u6247\u533a\u8fdb\u884c\u64e6\u5199\uff0c\u4f1a\u5bfc\u81f4\u8be5\u6247\u533a\u63d0\u524d\u635f\u574f\u3002<\/p>\n
\u56e0\u6b64\u9700\u8981\u4f7f\u7528\u78e8\u635f\u5747\u8861\u6280\u672f\uff0c\u5c3d\u91cf\u8ba9\u5404\u4e2a\u6247\u533a\u7684\u64e6\u5199\u6b21\u6570\u4fdd\u6301\u5747\u8861\u3002<\/p>\n
\u6bd4\u5982\u5728\u5b58\u50a8\u65e5\u5fd7\u6570\u636e\u65f6\uff0c\u53ef\u4ee5\u91c7\u7528\u5faa\u73af\u5199\u5165\u7684\u65b9\u5f0f\uff0c\u6bcf\u6b21\u5199\u5165\u4e0d\u540c\u7684\u6247\u533a\u3002<\/p>\n
\/\/ \u7b80\u5355\u7684\u5faa\u73af\u5199\u5165\u793a\u4f8b\n#define LOG_SECTOR_COUNT    10\n#define LOG_SECTOR_SIZE     4096\n\u200b\ntypedef struct {\n    uint32_t current_sector;\n    uint32_t write_count[LOG_SECTOR_COUNT];\n} LogManager_t;\n\u200b\nLogManager_t log_mgr = {0};\n\u200b\nvoid Log_Write(uint8_t *data, uint32_t len)\n{\n    uint32_t sector_addr = FLASH_USER_START_ADDR + \n                          log_mgr.current_sector * LOG_SECTOR_SIZE;\n    \n    \/\/ \u64e6\u9664\u5f53\u524d\u6247\u533a\n    Flash_Erase(sector_addr, sector_addr + LOG_SECTOR_SIZE - 1);\n    \n    \/\/ \u5199\u5165\u6570\u636e\n    Flash_Write(sector_addr, (uint32_t*)data, len \/ 4);\n    \n    \/\/ \u66f4\u65b0\u5199\u5165\u8ba1\u6570\n    log_mgr.write_count[log_mgr.current_sector]++;\n    \n    \/\/ \u5207\u6362\u5230\u4e0b\u4e00\u4e2a\u6247\u533a\n    log_mgr.current_sector = (log_mgr.current_sector + 1) % LOG_SECTOR_COUNT;\n}<\/code><\/pre>\n
2.4 EEPROM \u7684\u7279\u70b9<\/h3>\n
EEPROM\uff08Electrically Erasable Programmable ROM\uff0c\u7535\u53ef\u64e6\u9664\u53ef\u7f16\u7a0b\u53ea\u8bfb\u5b58\u50a8\u5668\uff09\u662f\u53e6\u4e00\u79cd\u5e38\u89c1\u7684\u975e\u6613\u5931\u6027\u5b58\u50a8\u5668\u3002<\/p>\n
\u5b83\u7684\u4f18\u70b9\u662f\u53ef\u4ee5\u6309\u5b57\u8282\u64e6\u5199\uff0c\u4e0d\u9700\u8981\u50cf Flash \u90a3\u6837\u4ee5\u6247\u533a\u4e3a\u5355\u4f4d\u3002<\/p>\n
\u4f46 EEPROM \u7684\u5bb9\u91cf\u901a\u5e38\u8f83\u5c0f\uff0c\u6210\u672c\u4e5f\u8f83\u9ad8\u3002<\/p>\n
\u4e00\u4e9b STM32 \u82af\u7247\u6ca1\u6709\u96c6\u6210 EEPROM\uff0c\u4f46\u53ef\u4ee5\u901a\u8fc7\u8f6f\u4ef6\u6a21\u62df\u7684\u65b9\u5f0f\uff0c\u4f7f\u7528 Flash \u6765\u5b9e\u73b0 EEPROM \u7684\u529f\u80fd\u3002HAL \u5e93\u63d0\u4f9b\u4e86\u76f8\u5e94\u7684\u63a5\u53e3\uff1a<\/p>\n
\/\/ \u4f7f\u7528HAL\u5e93\u7684EEPROM\u6a21\u62df\u529f\u80fd\n#include "stm32f1xx_hal.h"\n\u200b\n\/\/ \u5199\u5165\u4e00\u4e2a\u53d8\u91cf\u5230\u6a21\u62dfEEPROM\nHAL_StatusTypeDef EEPROM_WriteVariable(uint16_t VirtAddress, uint16_t Data)\n{\n    \/\/ HAL\u5e93\u4f1a\u81ea\u52a8\u5904\u7406Flash\u7684\u64e6\u9664\u548c\u5199\u5165\n    return HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, \n                            VirtAddress, \n                            Data);\n}\n\u200b\n\/\/ \u4ece\u6a21\u62dfEEPROM\u8bfb\u53d6\u53d8\u91cf\nuint16_t EEPROM_ReadVariable(uint16_t VirtAddress)\n{\n    return (*(__IO uint16_t*)VirtAddress);\n}<\/code><\/pre>\n
3. RAM \u4e0e ROM \u7684\u5bf9\u6bd4\u4e0e\u5e94\u7528<\/h2>\n
\u5728\u5d4c\u5165\u5f0f\u5f00\u53d1\u4e2d\uff0cRAM \u548c ROM \u5404\u6709\u5176\u9002\u7528\u573a\u666f\u3002<\/p>\n
RAM \u901f\u5ea6\u5feb\u3001\u53ef\u4ee5\u968f\u673a\u8bfb\u5199\uff0c\u9002\u5408\u5b58\u50a8\u7a0b\u5e8f\u8fd0\u884c\u65f6\u7684\u4e34\u65f6\u6570\u636e\uff0c\u6bd4\u5982\u53d8\u91cf\u3001\u5806\u6808\u3001\u7f13\u51b2\u533a\u7b49\u3002<\/p>\n
ROM \u867d\u7136\u901f\u5ea6\u8f83\u6162\u3001\u64e6\u5199\u6b21\u6570\u6709\u9650\uff0c\u4f46\u5b83\u80fd\u591f\u65ad\u7535\u4fdd\u5b58\u6570\u636e\uff0c\u9002\u5408\u5b58\u50a8\u7a0b\u5e8f\u4ee3\u7801\u3001\u5e38\u91cf\u6570\u636e\u3001\u914d\u7f6e\u53c2\u6570\u7b49\u3002<\/p>\n
\u5728\u5b9e\u9645\u9879\u76ee\u4e2d\uff0c\u6211\u4eec\u9700\u8981\u5408\u7406\u5206\u914d\u8fd9\u4e24\u79cd\u5b58\u50a8\u5668\u7684\u4f7f\u7528\u3002<\/p>\n
\u6bd4\u5982\u5728 STM32 \u4e2d\uff0c\u7a0b\u5e8f\u4ee3\u7801\u5b58\u50a8\u5728 Flash \u4e2d\uff0c\u542f\u52a8\u540e CPU \u4ece Flash \u4e2d\u8bfb\u53d6\u6307\u4ee4\u6267\u884c\u3002<\/p>\n
\u5168\u5c40\u53d8\u91cf\u3001\u5c40\u90e8\u53d8\u91cf\u3001\u52a8\u6001\u5206\u914d\u7684\u5185\u5b58\u90fd\u5728 SRAM \u4e2d\u3002<\/p>\n
\u5982\u679c\u9700\u8981\u4fdd\u5b58\u7528\u6237\u914d\u7f6e\u6216\u6821\u51c6\u6570\u636e\uff0c\u53ef\u4ee5\u4f7f\u7528 Flash \u7684\u67d0\u4e2a\u6247\u533a\u6216\u5916\u63a5 EEPROM\u3002<\/p>\n
\u5bf9\u4e8e\u8fd0\u884c Linux \u7684\u5d4c\u5165\u5f0f\u7cfb\u7edf\uff0c\u901a\u5e38\u4f1a\u4f7f\u7528 NOR Flash \u5b58\u50a8 bootloader \u548c\u5185\u6838\uff0c\u4f7f\u7528 NAND Flash \u5b58\u50a8\u6587\u4ef6\u7cfb\u7edf\uff0c\u4f7f\u7528 DRAM \u4f5c\u4e3a\u8fd0\u884c\u5185\u5b58\u3002<\/p>\n
\u8fd9\u79cd\u7ec4\u5408\u80fd\u591f\u5728\u6210\u672c\u3001\u6027\u80fd\u548c\u53ef\u9760\u6027\u4e4b\u95f4\u53d6\u5f97\u826f\u597d\u7684\u5e73\u8861\u3002<\/p>\n
\u7406\u89e3 RAM \u548c ROM \u7684\u5e95\u5c42\u7ed3\u6784\u548c\u5de5\u4f5c\u539f\u7406\uff0c\u4e0d\u4ec5\u80fd\u5e2e\u52a9\u6211\u4eec\u5199\u51fa\u66f4\u9ad8\u6548\u7684\u4ee3\u7801\uff0c\u8fd8\u80fd\u5728\u9047\u5230\u5b58\u50a8\u76f8\u5173\u95ee\u9898\u65f6\u5feb\u901f\u5b9a\u4f4d\u539f\u56e0\u3002<\/p>\n
\u5e0c\u671b\u8fd9\u7bc7\u6587\u7ae0\u80fd\u591f\u5e2e\u52a9\u5927\u5bb6\u66f4\u6df1\u5165\u5730\u7406\u89e3\u8fd9\u4e24\u79cd\u57fa\u7840\u800c\u91cd\u8981\u7684\u5b58\u50a8\u5668\u3002<\/p>\n
\u66f4\u591a\u7f16\u7a0b\u5b66\u4e60\u8d44\u6e90<\/strong><\/p>\n